Awarding of contracts for STXMOD chip design and development services

Description

The division Smart Sensing and Electronics (SSE) of Fraunhofer IIS is currently looking for contractors who can provide services as digital functional verification and digital IC-design backend experts as part of the "STXMOD" project. In STXMOD the next generation of high performance computing accelerators will be developed as a System on Chip in 12 nm silicon technology. Lot 1: B.1_Lot1_STXMOD_Digital_functional_verification Within the STXMOD project a high performance computing application class specific accelerator chip for very complex multi-dimensional stencil and tensor calculations will be developed in 12 nm FinFET silicon technology. To assure the correct functionality digital functional verification on block level and over the hierarchy up to system on chip top level has to be performed. The use of Universal Verification Methodology UVM and sufficient test case and result documentation is mandatory. Therefore, one meeting per quarter shall be performed at the Fraunhofer Institute for Integrated Circuits in Erlangen-Tennenlohe. Furthermore, flexibility of working hours is required in order to be able to react promptly to urgent adjustments. Lot 2: B.2_Lot2_STXMOD_Digital_backend_design Within the STXMOD project a high performance computing application class specific accelerator chip for very complex multi-dimensional stencil and tensor calculations will be developed in 12 nm FinFET silicon technology. For the chip implementation a digital backend design expert is requested to execute floorplanning, timing and power analysis, power routing, top level and hierarchical block level place&route and layout verification. Therefore, one meeting per quarter shall be performed at the Fraunhofer Institute for Integrated Circuits in Erlangen-Tennenlohe. Furthermore, flexibility of working hours is required in order to be able to react promptly to urgent adjustments.